Micaela Troglia Gamba


In November 2007 she received the Master of Science Degree in Electronics Engineering from the Politecnico di Torino with a thesis entitled “Algoritmi e architetture per il progetto di ricevitori MIMO”.  In Genuary 2008 she joined  the Very Large Scale Integration Laboratory (VLSI Lab), Department of Electronics, Politecnico di Torino, as PhD student.  From  September 2009 to March 2010 she was at École Nationale Supérieure des Télécommunications de Bretagne (Télécom Bretagne), Brest, France. In April 2011 she obtained her Co-agreement  PhD  in Electronics and Communication Engineering, between Politecnico di Torino and Tèlécom Bretagne. Her thesis is entitled “Algorithms and Architectures for the detection of MIMO signals”.

She  specialized in VLSI and ASIP (Application Specific Instruction set Processor) architectures for MIMO (Multiple-Input Multiple-Output) detection.  In particular, her research activity  focuses on algorithmic, architectural and implementation aspects of the “Sphere Decoder Algorithm” and of the “List Sphere Decoder”. The main objective was to propose area-efficient implementation solutions, while considering throughput, flexibility and error rate performance requirements of advanced digital communications systems.

From August 2011, she cooperates as Digital Hardware Designer with the NavSas Group of  ISMB. Her main activity is the FPGA implementation of an interference mitigation algorithm for GPS/Galileo receivers.